# In scan chain why negative edge flops are followed by positive edge flip flops

While scan stitching of the scan cells in any design, the tool will make sure that all the negative triggered flip-flops are placed first in the scan chain and then positive triggered flip flops. A scan chain contains

• All positive edge flip flops
• All negative edge flip flops
• A mix of positive and negative edge flip flops

There is no issue if a scan chain contains only negative or positive flops, problems arrives when there are both -ve and +ve flops. In general, the tool places all the negative flip flops first then followed by the positive flops. Here we might struck with a question, why not the positive flops first then followed by negative flops? Well there is reason to it.

For better understanding assume a scan chain with two positive edge flip flops and two negative edge flip flops as shown in the below figure 1 and we need four clock cycles to transfer the data through the given four flip flops, But if we place the positive flip flops first followed by negative flip flops then the data will be transfer out with in three clock cycles which is not good for a design and we might get the hold violations. Fig 1 : Positive_Negative_flip_flop

If the design needs the positive triggered flops to be placed first in a scan chains, then to avoid the two shifts in single clock cycle,place a negative latch (lockup latch) at the intersection junction of the positive and negative flops. Hold time violation can be meet during DFT shift mode using lockup latch. Fig 2: Positive FF_Latch_Negtive_FF

Or we can place all the negative flip flops first and followed by positive flops and thus we can avoid the data shift twice in a clock cycle. Fig 3 : Negative_FF_Positive_FF

## One comment

1. jv says:

Of all my google search results for this explanation, yours was the most precise, thank you very much!