Showing posts with label DEF. Show all posts
Showing posts with label DEF. Show all posts

Friday, 20 September 2019

Difference between LEF and DEF files

LEF –Library Exchange format
All the physical information of the design can be provided in the LEF file, these files are loaded into the pnr tools instead of loading the full design which takes huge memory and huge time to load and there are two types of LEF files

  • Technology LEF file
  • Cell LEF file

A technology LEF contains all the placement and routing design rules, process information of the technology. For best practice try to load the technology file first and then load the other lef file. A cell LEF files contains all the physical information of the macros and the standard cell

DEF -Design Exchange format
A DEF file is used to describe all the physical aspects of a design,

  • Die size
  • Connectivity 
  • Physical location of cells and macros on the chip. 

It contains floor-planning information such as –

  • Standard cell rows
  • groups- Placement and routing

Blockages

  • Placement constraints
  • Power domain boundaries. 

DEf file also contains the physical information of pins, signal routing ,power routing etc


Physical Cells :TAP CELLS, TIE CELLS, ENDCAP CELLS, DECAP CELLS

Tap Cells (Well Taps) :  These library cells connect the power and ground connections to the substrate and n­wells, respectively.  By plac...