Before implementing the logic, we will have a look at the truth table of the NAND gate and the inverter.
NAND GATE
| A | B | O |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
NOT GATE
| A | O |
|---|---|
| 0 | 1 |
| 1 | 0 |
Fro the NAND gate truth table we can conclude the following
When both the inputs are zero(0) ==> output is 1 (same as inverter)
when both the inputs are one(1) ==> output is 0 (same as inverter)
Thus we can implement the not gate by connecting the both inputs together as shown below
There is another way of implementation of inverter using NAND gate , from truth table when input pin A is high (logic one) Nand gate behavious as INVERTER
Before implementing the logic, we will have a look at the truth table of the NOR gate and the inverter.
NOR GATE
| A | B | O |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 0 |
NOT GATE
| A | O |
|---|---|
| 0 | 1 |
| 1 | 0 |
case I:
From the NOR truth table we can see that when
both the inputs are zero(0) ==> output is 1(same as inverter)
both the inputs are one (1) ==> output is 0 (same as inverter)
Case II :
second way of implementation of Inverter using Nor Gate.
